The present invention is related to computer-aided design, and more particularly to a computer-aided design placement tool for performing 2-dimensional transistor placement with emphasis on reliability verification constraints in integrated circuit layout.
Integrated circuits comprise a collection of components, including but not limited to transistors, resistors, and capacitors, fabricated on a semiconductor substrate. The components are connected with metal interconnections, called wires, to form a system such as a microprocessor. Integrated circuit performance has been improving because the components and the wires are being fabricated in smaller sizes to increase the density of the integrated circuits. However, keeping the correct functionality of an integrated circuit intact over extended periods of usage and preventing breakdowns are new concerns that designers and computer-aided design tools need to address for circuit designs.
Circuits that function properly when fabricated often fail to work after a certain period of use. Such failures are caused by various reliability phenomena. Electromigration is a common reliability phenomenon that affects high-frequency circuits today. Electromigration refers to the migration of metal ions due to prolonged electron flow in the same direction. Electromigration causes progressive damage to metal conductors in an integrated circuit. Electromigration results in the creation of voids and hillocks in the metal interconnections, as a result of which the effective cross-section of the conductor comes down. Over time, the metal width of the interconnection is no longer sufficient to carry the current and this causes electrical opens or increased resistance which lead to circuit failure. FIGS. 1A and 1B are diagrams of a top view of a wire illustrating the effects of electromigration. As shown in FIG. 1A, a wire unaffected by electromigration has a uniform width. However, a wire having a high unidirectional current density experiences electromigration over a period of use. As shown in FIG. 1B, the width of the wire is no longer uniform due to electromigration.
Another reliability phenomenon is the self-heat of metal wires. Self-heat refers to the thermal breakdown of a conductor, very similar to how a filament in a bulb burns out. FIGS. 2A and 2B are diagrams of a top view of a wire illustrating the effects of self-heat. As shown in FIG. 2A, a wire unaffected by self-heat has a uniform width. However, a wire having a high density current experiences self-heat over a period of use. As shown in FIG. 2B, a wire affected by self-heat breaks down and is no longer uniform.
Both of these problems are caused by large currents in interconnections that are not wide enough to handle them. In any modem high-frequency integrated circuit, interconnections have to be sized based on these reliability concerns. With microprocessor designs now entering the GHz frequency ranges, it is extremely critical to optimize their design layouts for reliability verification (RV) constraints. But optimizing layouts by hand for reliability verification constraints affects a mask-designer""s productivity because the amount of layout rework involved can be quite significant. However, currently available automated placement algorithms do not consider reliability verification issues.
Accordingly, there is a need for an automated design tool that minimizes reliability concerns arising from electromigration and self heat, while at the same time achieves a high layout density.
According to one embodiment of the present invention, a computerized method of creating a layout for a circuit design includes receiving a circuit design and receiving at least one layout rule based on a reliability verification constraint for the circuit design. The computerized method further includes generating a layout for the circuit design through computer automated operations wherein the layout generated satisfies the at least one layout rule based on the reliability verification constraint received for the circuit design.
Other embodiments are described and claimed.